Publications

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2010

Portable, Scalable, per-Core Power Estimation for Intelligent Resource Management

B. Goel, S. A. McKee, R. Gioiosa, K. Singh, M. Bhadauria, and M. Cesati
J-DSE: Joint Software and Hardware Design Space Exploration for Application Specific Processors

M. Paolieri, I. Bonesana, R. Gioiosa, and M. Valero
Use of Randomized Caches in Hard Real-Time Systems

6th ACACES 2010 (Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems)

L. Kosmidis, E. Quinones, J. Abella, F. Cazorla, G. Bernat, and E. D. Berger
MERASA: Multi-Core Execution of Hard Real-Time Applications Supporting Analysability

T. Ungerer, F. Cazorla, P. Sainrat, G. Bernat, Z. Petrov, H. Casse, C. Rochange, E. Quinones, S. Uhrig, M. Gerdes, I. Guliashvili, M. Houston, F. Kluge, and S. Met
Thread to Strand Binding of Parallel Network Applications in Massive Multi-Threaded Systems

P. Radojkovic, V. Cakarevic, J. Verdú, A. Pajuelo, F. Cazorla, M. Nemirovsky, and M. Valero
Adapting Cache Partitioning Algorithms to Real pseudo-LRU Replacement Policies

K. Kedzierski, M. Moreto, F. Cazorla, and M. Valero
Load Balancing Using Dynamic Cache Allocation

M. Moreto, F. Cazorla, R. Sakellariou, and M. Valero
Analyzing OS noise for HPC systems

A. Morari, F. Piermaria, E. Betti, R. Gioiosa, and M. Cesati
Using hardware resource allocation to balance HPC applications, Parallel and Distributed Computing

C. Boneti, R. Gioiosa, F. Cazorla, and M. Valero
Power and Performance Aware Reconfigurable Cache for CMPs

K. Kedzierski, F. Cazorla, R. Gioiosa, A. Buyuktosunoglu, and M. Valero

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